clock

xod/core/clock

Outputs pulses at regular intervals
clock
@/clock
Outputs pulses at regular intervals
IVALnumber
Tick interval in seconds
ENboolean
Is the clock enabled, i.e. produces ticks? At the moment when set to true, starts counting from scratch.
RSTpulse
Resets current count, restarts clock with new interval
clock
IVAL
EN
RST
TICK
TICKpulse
Pulses on each time interval end

C++ implementation

node {
    TimeMs nextTrig;

    void evaluate(Context ctx) {
        TimeMs tNow = transactionTime();
        auto ival = getValue<input_IVAL>(ctx);
        if (ival < 0) ival = 0;
        TimeMs dt = ival * 1000;
        TimeMs tNext = tNow + dt;

        auto isEnabled = getValue<input_EN>(ctx);
        auto isRstDirty = isInputDirty<input_RST>(ctx);

        if (isTimedOut(ctx) && isEnabled && !isRstDirty) {
            emitValue<output_TICK>(ctx, 1);
            nextTrig = tNext;
            setTimeout(ctx, dt);
        }

        if (isRstDirty || isInputDirty<input_EN>(ctx)) {
            // Handle enable/disable/reset
            if (!isEnabled) {
                // Disable timeout loop on explicit false on EN
                nextTrig = 0;
                clearTimeout(ctx);
            } else if (nextTrig < tNow || nextTrig > tNext) {
                // Start timeout from scratch
                nextTrig = tNext;
                setTimeout(ctx, dt);
            }
        }
    }
}

Tabular tests

__time(ms)IVALENRSTTICK
00.1trueno-pulseno-pulse
1000.1truepulseno-pulse
1200.1trueno-pulseno-pulse
2010.1trueno-pulsepulse
2500.1trueno-pulseno-pulse
3020.1trueno-pulsepulse
3500.1falseno-pulseno-pulse
4030.1falseno-pulseno-pulse
01truepulseno-pulse
5001truepulseno-pulse
10011trueno-pulseno-pulse
15011trueno-pulsepulse
// edge case: when IVAL is 0, `clock` should constantly emit pulses
00trueno-pulsepulse
10trueno-pulsepulse
21trueno-pulsepulse
10031trueno-pulsepulse
// edge case: when IVAL is negative, behave like it's 0
0-1trueno-pulsepulse
1-1trueno-pulsepulse
21trueno-pulsepulse
10031trueno-pulsepulse